1. Field of the Invention.
The present invention relates to an improved method of bonding a semiconductor chip to a dielectric body, such as a header, and more specifically, to providing a eutectic bond between a silicon chip and a package.
2. Prior Art.
Semiconductor fabrication usually requires a bonding of a semiconductor device, such as a silicon chip, to a packaging element. Various bonding methods, well-known in the prior art, are available to teach the bonding of the chip to the package. One general technique employs the use of gold (Au) or gold/silicon (Au/Si) alloy as a bonding medium for bonding the silicon chip to the package. Such bonding methods are described in U.S. Pat. Nos. 3,316,628; 3,585,711; 3,593,412; 4,454,528; and 3,298,093.
Although gold melts at approximately 1100 degrees C. and silicon melts at above 1400 degrees C., it is known that a gold/silicon eutectic alloy melts at approximately 400 degrees C. Therefore, the placing of the one element, gold, in proximity of the second element, silicon, causes a transmigration of atomic particles and when heated to approximately 400 degrees C., a Au/Si eutectic bond forms between the two elements. The above-named patents recite processes which utilizes property of the Au/Si alloy.
In addition, it is well-known in the prior art that an intermediate metal interposed between the silicon and the gold normally operates as a diffusion barrier which limits the amount of oxidation of the silicon. However, when heated, the increase in thermal energy causes a breakdown of the diffusion barrier and allows the Au/Si bonding to occur.
Therefore, it is a well-known process in the semiconductor industry to prepare a package surface where the bonding is accomplished by depositing gold on that surface. Then, preparing the die which includes a silicon chip, an intermediate metal, and gold on the surface of the intermediate metal, and placing the die onto the preform wherein the intermediate metal makes contact on the preform. Next, forcing the die by scrubbing at a temperature near the Au/Si eutectic melting point which causes the Au/Si eutectic bond to occur.
However, as the physical size of the silicon wafers increased, problems were encountered in the basic die attachment process. Die sizes of 0.200.times.0.200 inches and larger have historically been difficult to die attach due to wafer backside variations. Wafer backside variations occur because it is difficult to maintain a uniform thickness of the intermediate metal and this non-uniformity is multiplied in wafers having larger than 0.200.times.0.200 inch dimension.
The non-uniformity of the backside variation causes a non-uniformity of heat transfer resulting in non-uniform breakdown of the diffusion barrier. Therefore, if the temperature is too low, certain surfaces of the die will bond but portions may result in fast solidification (depending on the amount of Si flowing from the Si die) resulting in formation of voids. To compensate, the temperature may be raised to a level which assures diffusion barrier breakdown over the total area, but it has been found that temperatures above 500 degrees C. tend to crack the die due to thermal stress during subsequent cooling cycles and also produces metal "spiking".
What is needed is an improved Au/Si eutectic bonding process which may be performed at lower temperatures to prevent voids and cracks, yet provide for a bond over the complete surface area of a semiconductor wafer die having a dimension larger than 0.200.times.0.200 inches.
The present invention addresses this need and was invented and developed to overcome the problem of larger die attachment, such problem being well-known in the semiconductor industry.